The present invention relates to a semiconductor device and a processor system including the semiconductor device. More particularly, the present invention relates to a semiconductor device suitable for suppressing an increase in power consumption, and a processor system including the semiconductor device.
In the fields of a baseband processor and an application processor for cellular phones, the respective requirements regarding the function and performance thereof have become exacting. To satisfy such requirements, the capacity of a memory, such as a DRAM, has been increased, or the operating frequency of a processor has been increased, which results in a problem of an increase in power consumption.
For example, Japanese Unexamined Patent Application Publication No. 2012-133638 discloses an electronic device including a DRAM and a memory controller that controls the DRAM.
Additionally, Japanese Unexamined Patent Application Publication No. 2004-120781 discloses a memory circuit that outputs a control signal WAIT to a control circuit during a read transfer or a write transfer, thereby limiting access from the control circuit.
Japanese Unexamined Patent Application Publication No. 2007-257774 discloses a memory control device including adjustment means that adjusts a timing for refreshing a DRAM according to the degree of congestion of a bus used for a data transfer with the DRAM.
Japanese Unexamined Patent Application Publication No. 2007-94649 discloses an access arbitration circuit that dynamically changes the order of priority of previously stored access requests based on the order of priority of newly stored access requests.